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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 35,187 of 197,085
Downloads: 39,085
Daily
Ranking: 12,891 of 197,066
Downloads: 30
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| Rank | Downloads | Name |
|---|---|---|
| 27,730 | 54,606 | origen_sim |
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