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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,167 of 184,765
Downloads: 31,785
Daily
Ranking: 28,156 of 184,752
Downloads: 1
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| Rank | Downloads | Name |
|---|---|---|
| 26,391 | 48,946 | origen_sim |
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