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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 35,924 of 189,791
Downloads: 35,249
Daily
Ranking: 15,347 of 189,766
Downloads: 40
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| Rank | Downloads | Name |
|---|---|---|
| 27,210 | 51,757 | origen_sim |
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