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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,222 of 183,471
Downloads: 30,998
Daily
Ranking: 15,549 of 183,459
Downloads: 13
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| Rank | Downloads | Name |
|---|---|---|
| 26,242 | 47,983 | origen_sim |
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