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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,080 of 192,352
Downloads: 35,946
Daily
Ranking: 36,387 of 192,323
Downloads: 10
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| Rank | Downloads | Name |
|---|---|---|
| 27,429 | 52,689 | origen_sim |
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