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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,559 of 186,698
Downloads: 32,434
Daily
Ranking: 27,823 of 186,685
Downloads: 12
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| Rank | Downloads | Name |
|---|---|---|
| 26,822 | 49,703 | origen_sim |
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