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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,116 of 193,540
Downloads: 36,453
Daily
Ranking: 19,123 of 193,523
Downloads: 16
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| Rank | Downloads | Name |
|---|---|---|
| 27,537 | 53,228 | origen_sim |
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