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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 35,237 of 198,025
Downloads: 39,348
Daily
Ranking: 19,732 of 197,989
Downloads: 16
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| Rank | Downloads | Name |
|---|---|---|
| 27,856 | 54,752 | origen_sim |
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