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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,200 of 183,389
Downloads: 30,966
Daily
Ranking: 17,995 of 183,373
Downloads: 16
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| Rank | Downloads | Name |
|---|---|---|
| 26,242 | 47,897 | origen_sim |
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