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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,677 of 188,757
Downloads: 33,942
Daily
Ranking: 27,759 of 188,742
Downloads: 5
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| Rank | Downloads | Name |
|---|---|---|
| 27,147 | 51,398 | origen_sim |
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