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origen_verilog
A parser and generator for Verilog (IEEE 1364)
Total
Ranking: 36,593 of 189,199
Downloads: 34,212
Daily
Ranking: 37,931 of 189,169
Downloads: 4
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| Rank | Downloads | Name |
|---|---|---|
| 27,163 | 51,670 | origen_sim |
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