Jcll's Gems

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#Total RankDaily RankNameSummary
136,69539,116vhdl_tbA simple testbench generator for VHDL
243,03231,226crokusCrokus is a parser for a subset of C language. It has been use for teaching purposes an...
353,82557,388vertigo_vhdlA Ruby handwritten VHDL parser and utilities
454,19954,712vhdl_helpA simple snippets generator for VHDL on linux command line
5105,76787,989astrapiStarting from the metamodel of a DSL (abstract classes and their relationship), Astrapi...
6107,38967,286xypxyp is a simple 2D graphics plotter
7128,96667,286rtl_circuitsimple digital circuit modeling, with hierarchy and graphviz output
8140,69287,989sexpirsexpir is a sexp-based interchange format for RTL design
9147,566115,482scragHelps me design my DSL tools quicker
10170,05442,217ruby_rtlruby_rtl is a simple DSL for HW(RTL) design
11174,992115,482reggae_edaGenerates a bus-based VHDL IP from a register-map specification. An UART-bus master can...
12183,82194,974mir_processingMIR means 'Manipulations d'Images en Ruby