1 | 36,695 | 39,116 | vhdl_tb | A simple testbench generator for VHDL |
2 | 43,032 | 31,226 | crokus | Crokus is a parser for a subset of C language. It has been use for teaching purposes an... |
3 | 53,825 | 57,388 | vertigo_vhdl | A Ruby handwritten VHDL parser and utilities |
4 | 54,199 | 54,712 | vhdl_help | A simple snippets generator for VHDL on linux command line |
5 | 105,767 | 87,989 | astrapi | Starting from the metamodel of a DSL (abstract classes and their relationship), Astrapi... |
6 | 107,389 | 67,286 | xyp | xyp is a simple 2D graphics plotter |
7 | 128,966 | 67,286 | rtl_circuit | simple digital circuit modeling, with hierarchy and graphviz output |
8 | 140,692 | 87,989 | sexpir | sexpir is a sexp-based interchange format for RTL design |
9 | 147,566 | 115,482 | scrag | Helps me design my DSL tools quicker |
10 | 170,054 | 42,217 | ruby_rtl | ruby_rtl is a simple DSL for HW(RTL) design |
11 | 174,992 | 115,482 | reggae_eda | Generates a bus-based VHDL IP from a register-map specification. An UART-bus master can... |
12 | 183,821 | 94,974 | mir_processing | MIR means 'Manipulations d'Images en Ruby |