Jcll's Gems

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#Total RankDaily RankNameSummary
136,71149,628vhdl_tbA simple testbench generator for VHDL
243,03119,587crokusCrokus is a parser for a subset of C language. It has been use for teaching purposes an...
353,71249,628vertigo_vhdlA Ruby handwritten VHDL parser and utilities
454,26777,922vhdl_helpA simple snippets generator for VHDL on linux command line
5105,74743,003astrapiStarting from the metamodel of a DSL (abstract classes and their relationship), Astrapi...
6107,09377,922xypxyp is a simple 2D graphics plotter
7128,446113,854rtl_circuitsimple digital circuit modeling, with hierarchy and graphviz output
8140,23460,111sexpirsexpir is a sexp-based interchange format for RTL design
9147,21460,111scragHelps me design my DSL tools quicker
10169,756113,854ruby_rtlruby_rtl is a simple DSL for HW(RTL) design
11175,014113,854reggae_edaGenerates a bus-based VHDL IP from a register-map specification. An UART-bus master can...
12183,85977,922mir_processingMIR means 'Manipulations d'Images en Ruby