Jcll's Gems

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#Total RankDaily RankNameSummary
136,76942,408vhdl_tbA simple testbench generator for VHDL
242,69932,863crokusCrokus is a parser for a subset of C language. It has been use for teaching purposes an...
353,50142,408vertigo_vhdlA Ruby handwritten VHDL parser and utilities
454,37119,764vhdl_helpA simple snippets generator for VHDL on linux command line
5105,90293,116astrapiStarting from the metamodel of a DSL (abstract classes and their relationship), Astrapi...
6106,60793,116xypxyp is a simple 2D graphics plotter
7128,01893,116rtl_circuitsimple digital circuit modeling, with hierarchy and graphviz output
8139,78393,116sexpirsexpir is a sexp-based interchange format for RTL design
9146,83593,116scragHelps me design my DSL tools quicker
10169,42259,583ruby_rtlruby_rtl is a simple DSL for HW(RTL) design
11175,28559,583reggae_edaGenerates a bus-based VHDL IP from a register-map specification. An UART-bus master can...
12184,35993,116mir_processingMIR means 'Manipulations d'Images en Ruby