Jcll's Gems

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#Total RankDaily RankNameSummary
137,05845,617vhdl_tbA simple testbench generator for VHDL
242,77120,144crokusCrokus is a parser for a subset of C language. It has been use for teaching purposes an...
352,87620,640vertigo_vhdlA Ruby handwritten VHDL parser and utilities
454,67878,397vhdl_helpA simple snippets generator for VHDL on linux command line
5106,288144,265astrapiStarting from the metamodel of a DSL (abstract classes and their relationship), Astrapi...
6106,52940,562xypxyp is a simple 2D graphics plotter
7126,83152,713rtl_circuitsimple digital circuit modeling, with hierarchy and graphviz output
8138,59862,839sexpirsexpir is a sexp-based interchange format for RTL design
9145,88262,839scragHelps me design my DSL tools quicker
10169,08178,397ruby_rtlruby_rtl is a simple DSL for HW(RTL) design
11175,45478,397reggae_edaGenerates a bus-based VHDL IP from a register-map specification. An UART-bus master can...
12185,53478,397mir_processingMIR means 'Manipulations d'Images en Ruby