Jcll's Gems

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#Total RankDaily RankNameSummary
137,47547,767vhdl_tbA simple testbench generator for VHDL
243,06057,647crokusCrokus is a parser for a subset of C language. It has been use for teaching purposes an...
352,67857,647vertigo_vhdlA Ruby handwritten VHDL parser and utilities
455,03575,898vhdl_helpA simple snippets generator for VHDL on linux command line
5106,75057,647xypxyp is a simple 2D graphics plotter
6107,067115,124astrapiStarting from the metamodel of a DSL (abstract classes and their relationship), Astrapi...
7126,85341,511rtl_circuitsimple digital circuit modeling, with hierarchy and graphviz output
8138,79075,898sexpirsexpir is a sexp-based interchange format for RTL design
9145,919115,124scragHelps me design my DSL tools quicker
10169,452115,124ruby_rtlruby_rtl is a simple DSL for HW(RTL) design
11176,228115,124reggae_edaGenerates a bus-based VHDL IP from a register-map specification. An UART-bus master can...
12186,45675,898mir_processingMIR means 'Manipulations d'Images en Ruby