Jcll's Gems

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#Total RankDaily RankNameSummary
136,05624,802vhdl_tbA simple testbench generator for VHDL
242,79227,962crokusCrokus is a parser for a subset of C language. It has been use for teaching purposes an...
354,32238,031vhdl_helpA simple snippets generator for VHDL on linux command line
456,90629,930vertigo_vhdlA Ruby handwritten VHDL parser and utilities
5103,688136,377astrapiStarting from the metamodel of a DSL (abstract classes and their relationship), Astrapi...
6109,11770,697xypxyp is a simple 2D graphics plotter
7130,05684,840rtl_circuitsimple digital circuit modeling, with hierarchy and graphviz output
8142,463105,358sexpirsexpir is a sexp-based interchange format for RTL design
9150,84384,840scragHelps me design my DSL tools quicker
10168,243105,358ruby_rtlruby_rtl is a simple DSL for HW(RTL) design
11172,008105,358reggae_edaGenerates a bus-based VHDL IP from a register-map specification. An UART-bus master can...
12179,83984,840mir_processingMIR means 'Manipulations d'Images en Ruby