| 1 | 36,302 | 41,916 | vhdl_tb | A simple testbench generator for VHDL |
| 2 | 42,726 | 14,438 | crokus | Crokus is a parser for a subset of C language. It has been use for teaching purposes an... |
| 3 | 54,034 | 63,432 | vhdl_help | A simple snippets generator for VHDL on linux command line |
| 4 | 54,890 | 41,916 | vertigo_vhdl | A Ruby handwritten VHDL parser and utilities |
| 5 | 104,619 | 41,916 | astrapi | Starting from the metamodel of a DSL (abstract classes and their relationship), Astrapi... |
| 6 | 108,692 | 41,916 | xyp | xyp is a simple 2D graphics plotter |
| 7 | 130,323 | 25,458 | rtl_circuit | simple digital circuit modeling, with hierarchy and graphviz output |
| 8 | 142,164 | 63,432 | sexpir | sexpir is a sexp-based interchange format for RTL design |
| 9 | 148,553 | 25,458 | scrag | Helps me design my DSL tools quicker |
| 10 | 169,762 | 41,916 | ruby_rtl | ruby_rtl is a simple DSL for HW(RTL) design |
| 11 | 173,431 | 30,305 | reggae_eda | Generates a bus-based VHDL IP from a register-map specification. An UART-bus master can... |
| 12 | 181,788 | 41,916 | mir_processing | MIR means 'Manipulations d'Images en Ruby |
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