| 1 | 36,227 | 47,329 | vhdl_tb | A simple testbench generator for VHDL |
| 2 | 42,764 | 47,329 | crokus | Crokus is a parser for a subset of C language. It has been use for teaching purposes an... |
| 3 | 53,993 | 74,510 | vhdl_help | A simple snippets generator for VHDL on linux command line |
| 4 | 55,117 | 47,329 | vertigo_vhdl | A Ruby handwritten VHDL parser and utilities |
| 5 | 104,530 | 74,510 | astrapi | Starting from the metamodel of a DSL (abstract classes and their relationship), Astrapi... |
| 6 | 108,754 | 74,510 | xyp | xyp is a simple 2D graphics plotter |
| 7 | 130,209 | 74,510 | rtl_circuit | simple digital circuit modeling, with hierarchy and graphviz output |
| 8 | 142,175 | 74,510 | sexpir | sexpir is a sexp-based interchange format for RTL design |
| 9 | 148,618 | 74,510 | scrag | Helps me design my DSL tools quicker |
| 10 | 169,587 | 74,510 | ruby_rtl | ruby_rtl is a simple DSL for HW(RTL) design |
| 11 | 173,251 | 47,329 | reggae_eda | Generates a bus-based VHDL IP from a register-map specification. An UART-bus master can... |
| 12 | 181,558 | 47,329 | mir_processing | MIR means 'Manipulations d'Images en Ruby |
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